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Michaela Blott

cs.ARcs.LGcs.CVeess.SPcs.AIcs.DCbig datacodesigncoprocessorsfast machine learning

On Valency

published · living versions
W_6wu3pw8p·v1 · currentpublished
FAT: Training Neural Networks for Reliable Inference Under Hardware Faults
with Ussama Zahid, Giulio Gambardella, Nicholas J. Fraser, Kees Vissers
1 version

Preprints & journals

31 papers in the corpus · 2014–2026
Arithmetic Packing on Wide Integer Datapaths in DSP Primitives of Modern FPGA Devices2606.11065v1 · Titus Borntrager, Shane Fleming, Philipp Holzinger et al.2026 · 0 citationsarXiv
FlexLLM: Composable HLS Library for Flexible Hybrid LLM Accelerator Design2601.15710v1 · Jiahao Zhang, Zifan He, Nicholas Fraser et al.2026 · 0 citationsarXiv
SIRA: Scaled-Integer Range Analysis for Optimizing FPGA Dataflow Neural Network Accelerators2508.21493v1 · Yaman Umuroglu, Christoph Berganski, Felix Jentzsch et al.2025 · 1 citationarXiv
FINN-GL: Generalized Mixed-Precision Extensions for FPGA-Accelerated LSTMs2506.20810v1 · Shashwat Khandelwal, Jakoba Petri-Koenig, Thomas B. Preu\sser et al.2025 · 1 citationarXiv
Improving Quantization with Post-Training Model Expansion2503.17513v2 · Giuseppe Franco, Pablo Monteagudo-Lago, Ian Colbert et al.2025 · 0 citationsarXiv
Optimizing Communication for Latency Sensitive HPC Applications on up to 48 FPGAs Using ACCL2403.18374v2 · Marius Meyer, Tobias Kenter, Lucian Petrica et al.2024 · 4 citationsarXiv
ACCL+: an FPGA-Based Collective Engine for Distributed Applications2312.11742v1 · Zhenhao He, Dario Korolija, Yu Zhu et al.2023 · 1 citationarXiv
Shedding the Bits: Pushing the Boundaries of Quantization with Minifloats on FPGAs2311.12359v3 · Shivam Aggarwal, Hans Jakob Damsgaard, Alessandro Pappalardo et al.2023 · 5 citationsarXiv
Corrigendum: Applications and techniques for fast machine learning in science.37908454 · Deiana, Allison McCarn, Tran, Nhan, Agar, Joshua et al.2023 · 2 citationsFrontiers in big data. 2023;6:1301942
Implementing Neural Network-Based Equalizers in a Coherent Optical Transmission System Using Field-Programmable Gate Arrays2212.04703v2 · Pedro J. Freire, Sasipim Srivallapanondh, Michael Anderson et al.2022 · 26 citationsarXiv
LL-GNN: Low Latency Graph Neural Networks on FPGAs for High Energy Physics2209.14065v5 · Zhiqiang Que, Hongxiang Fan, Marcus Loo et al.2022 · 23 citationsarXiv
Open-source FPGA-ML codesign for the MLPerf Tiny Benchmark2206.11791v1 · Hendrik Borras, Giuseppe Di Guglielmo, Javier Duarte et al.2022 · 8 citationsarXiv
QONNX: Representing Arbitrary-Precision Quantized Neural Networks2206.07527v3 · Alessandro Pappalardo, Yaman Umuroglu, Michaela Blott et al.2022 · 12 citationsarXiv
Applications and Techniques for Fast Machine Learning in Science.35496379 · Deiana, Allison McCarn, Tran, Nhan, Agar, Joshua et al.2026 · 77 citationsFrontiers in big data. 2022;5:787421
EcoFlow: Efficient Convolutional Dataflows for Low-Power Neural Network Accelerators2202.02310v1 · Lois Orosa, Skanda Koppula, Yaman Umuroglu et al.2022 · 1 citationarXiv
On the RTL Implementation of FINN Matrix Vector Compute Unit2201.11409v2 · Syed Asad Alam, David Gregg, Giulio Gambardella et al.2022 · 4 citationsarXiv
Memory-Efficient Dataflow Inference for Deep CNNs on FPGA2011.07317v1 · Lucian Petrica, Tobias Alonso, Mairin Kroes et al.2020 · 36 citationsarXiv
FAT: Training Neural Networks for Reliable Inference Under Hardware Faults2011.05873v1 · Ussama Zahid, Giulio Gambardella, Nicholas J. Fraser et al.2020 · 52 citationsarXivon Valency
LogicNets: Co-Designed Neural Networks and Circuits for Extreme-Throughput Applications2004.03021v1 · Yaman Umuroglu, Yash Akhauri, Nicholas J. Fraser et al.2020 · 126 citationsarXiv
Evolutionary Bin Packing for Memory-Efficient Dataflow Inference Acceleration on FPGA2003.12449v1 · Mairin Kroes, Lucian Petrica, Sorin Cotofana et al.2020 · 7 citationsarXiv
QuTiBench: Benchmarking Neural Networks on Heterogeneous Hardware1909.05009v2 · Michaela Blott, Lisa Halder, Miriam Leeser et al.2019 · 5 citationsACM JETC 2019
FINN-R: An End-to-End Deep-Learning Framework for Fast Exploration of Quantized Neural Networks1809.04570v1 · Michaela Blott, Thomas Preusser, Nicholas Fraser et al.2018 · 31 citationsarXiv
Accuracy to Throughput Trade-offs for Reduced Precision Neural Networks on Reconfigurable Logic1807.10577v1 · Jiang Su, Nicholas J. Fraser, Giulio Gambardella et al.2018 · 20 citationsarXiv
FINN-L: Library Extensions and Design Trade-off Analysis for Variable Precision LSTM Networks on FPGAs1807.04093v1 · Vladimir Rybalkin, Alessandro Pappalardo, Muhammad Mohsin Ghaffar et al.2018 · 73 citationsarXiv
SYQ: Learning Symmetric Quantization For Efficient Deep Neural Networks1807.00301v1 · Julian Faraone, Nicholas Fraser, Michaela Blott et al.2018 · 134 citationsarXiv
Scaling Neural Network Performance through Customized Hardware Architectures on Reconfigurable Logic1807.03123v1 · Michaela Blott, Thomas B. Preusser, Nicholas Fraser et al.2018 · 7 citationsarXiv
Compressing Low Precision Deep Neural Networks Using Sparsity-Induced Regularization in Ternary Networks1709.06262v2 · Julian Faraone, Nicholas Fraser, Giulio Gambardella et al.2017 · 14 citationsarXiv
Scaling Binarized Neural Networks on Reconfigurable Logic1701.03400v2 · Nicholas J. Fraser, Yaman Umuroglu, Giulio Gambardella et al.2017 · 54 citationsarXiv
High-Level Synthesis Case Study: Implementation of a Memcached Server1408.5387v1 · Kimon Karras, Michaela Blott, Kees Vissers2014 · 6 citationsarXiv
Career total: 82 works. 31 are in this corpus.

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