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Robert S. Aviles

cs.ETcond-mat.supr-concs.ARcs.CRcs.NE

On Valency

published · living versions
W_f2z2e9vw·v1 · currentpublished
qLevelPlace: A Level-Based Placement Framework for RSFQ Circuits
with Ziyu Liu, Jingkai Hong, Sasan Razmkhah, Peter A. Beerel +1
1 version

Preprints & journals

10 papers in the corpus · 2022–2026
qPRO-AQFP: Post-Routing Optimization of AQFP Circuits with Delay Line Clocking2604.08705v1 · Robert S. Aviles, Ziyu Liu, Jingkai Hong et al.2026 · 0 citationsarXiv
Optimizing Phase-Scheduling with Throughput Trade-offs in AQFP Digital Circuits2510.03956v1 · Robert S. Aviles, Peter A. Beerel2025 · 0 citationsarXiv
SCE-NTT: A Hardware Accelerator for Number Theoretic Transform Using Superconductor Electronics2508.21265v1 · Sasan Razmkhah, Mingye Li, Zeming Cheng et al.2025 · 0 citationsarXiv
Towards Energy-Efficient, Low-Latency and Accurate Spiking LSTMs2210.12613v1 · Gourav Datta, Haoqin Deng, Robert Aviles et al.2022 · 10 citationsarXiv
Career total: 13 works. 10 are in this corpus.

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