WorksMathematics
Polynomial-Time Unitary Synthesis from a Boolean Oracle
Abstract
We give a positive answer to the constant-error formulation of the Aaronson–Kuperberg unitary synthesis problem. For every n, a quantum oracle circuit generated in polynomial time from n alone can approximate the channel of every n-qubit unitary to full diamond-norm error at most 1/2, after a suitable Boolean oracle is chosen. Using the fixed gates , the circuit has polynomially many qubits, elementary gates, and oracle calls, and its oracle queries have polynomial length. The oracle may depend on the target unitary; the theorem does not give an efficient classical procedure for constructing it.
Introduction
A classical description of a quantum operation can be much longer than the register on which the operation acts. Oracle access offers a way to separate the size of that description from the work needed to use it. The unitary synthesis problem asks whether every operation on qubits can be performed in quantum polynomial time when a suitable classical description is available through coherent queries to a Boolean function. Aaronson and Kuperberg posed this question in 2007 [2], Section 7, Problem (4); Aaronson later highlighted it among open problems in quantum query complexity [1], Problem 6.
We give a positive answer to the constant-error formulation. One circuit, determined only by , works for every -qubit unitary after an appropriate Boolean oracle is chosen. The circuit uses polynomially many gates, qubits, and queries, and each query has polynomial length. The error bound holds for arbitrary input states, including states entangled with a reference system.
Model and main result
We use the fixed elementary gate set
where . A Boolean oracle supplies the gate
A circuit receives an -qubit input and workspace initialized to zero. Its output channel is obtained by retaining designated qubits and tracing out the remaining qubits.
For a unitary , write . Our convention for channel error is the full diamond norm: if is another channel on qubits, then
where is an -qubit reference register and ranges over density operators on the input and . Thus the norm in (1.2) has no factor of .
Theorem 1.1 (Polynomial-time unitary synthesis). There are a polynomial and a deterministic classical algorithm which, on input for any integer , outputs in time at most a quantum oracle circuit with the following properties. The circuit uses the gates , , , CNOT and a single Boolean oracle of input length . Its total number of qubits, elementary gates, and oracle calls are each at most . For every unitary there is a function for which the output channel of satisfies
The quantifiers are essential. The circuit and its resource bounds depend only on ; the oracle may depend on . There is no restriction on the truth-table size or classical circuit complexity of , and no prescribed encoding of that the algorithm must use. The theorem is an existence statement about such an encoding. It does not give an efficient classical procedure for constructing the oracle from a description of .
Earlier work
State synthesis provides a useful comparison. It asks for preparation of one specified state from a fixed input, whereas unitary synthesis must act coherently on every input. Irani, Natarajan, Nirkhe, Rao, and Yuen obtained one- and two-query state-synthesis results with polynomial space [11]. Rosenthal subsequently gave uniform polynomial-size state-synthesis circuits using one Boolean query when workspace may be discarded, and four queries when it must be returned to zero [15]. These results do not immediately implement an arbitrary unitary: preparing a chosen column while retaining its input label does not erase that label coherently on a superposition of inputs.
For unitary synthesis, Rosenthal gave a running-time upper bound of order up to polynomial factors, using an oracle suited to the target unitary [16]. In the other direction, Lombardi, Ma, and Wright proved a general one-query lower bound, which also rules out polynomially many parallel queries of polynomial length [12]. Dong, Lombardi, and Ma obtained explicit one-query separations for several structured families of unitaries [8]. These lower bounds leave open the use of multiple queries interleaved with quantum computation, as in the construction here.
Nehoran and Yuen recently showed that every unitary in dimension admits a constant-query implementation using three diagonal-phase queries, or six Boolean queries [14]. The diagonal-phase version uses query qubits for operator-norm error . For , this is exponential in the number of input qubits. Theorem 1.1 concerns polynomial total resources, including the width of the oracle interface. The distinction between query count and query width is therefore indispensable when comparing these results.
The reduction
The central construction replaces synthesis of a -dimensional unitary by synthesis of one smaller, coherently controlled unitary. Each reduction removes a fraction at least of the dimension, so only polynomially many reductions are needed even when . The smaller synthesis circuit is used exactly once at each step. This last property prevents the recursion from producing an exponentially large circuit.
Here is the mechanism. After changes of basis built from permutations, diagonal signs, and Walsh transforms, write the current unitary as
where has the dimension to be removed. Random diagonal signs and Walsh transforms supply this contracting block. The needed norm estimate is proved by a Gaussian moment argument in Section 3. For a diagonal unitary on the removed coordinates, close the lower output back into the lower input through . Solving the resulting linear equation gives
Conservation of norm makes unitary on the remaining coordinates. This is the familiar transfer-function construction for a unitary block matrix [9]; our task is to turn it into a circuit reduction.
For that purpose we construct two maps, and , from the original space into a register holding together with a smaller state. They satisfy an approximate intertwining relation
where applies the corresponding controlled by the register. Both maps are nearly isometric. They come from truncating the forward and backward geometric series associated with . Averaging over a common phase cancels unequal degrees, and unitarity makes the remaining Gram-matrix sums telescope. The errors decay exponentially with the truncation length.
The implementability of these maps depends on their Fourier coefficients. We assign to each removed coordinate the frequency vector , where is the truncation length. The Fourier frequency of a product of at most phases records a multiset of coordinates through its power sums. For an input on a removed coordinate, each nonzero coefficient records a multiset containing that coordinate. Inputs on the remaining coordinates contribute only at frequency zero, with one input column per output coordinate. Consequently every row of either coefficient matrix has at most nonzero entries, although a column may be dense. This row bound lets a circuit coherently erase the input index after preparing a column. Amplitude amplification then converts the resulting scaled map into an approximation to the required encoding. The two encoders surround a single call to the smaller unitary, as shown in Figure 1.

Figure 1. One recursion level. Labels above the arrows are the comparison states used in Lemma 6.1; the intermediate states are approximate, as quantified there. The phase register supplies the control to the single smaller synthesis circuit. The local encoders contain their own amplification rounds, while the smaller circuit occurs only once. The map initializes all work registers to zero, so the final comparison also records their cleanup.
The feedback identity, the matching forward and backward encodings, and the multiset argument are developed in Section 4. Section 5 proves the circuit implementation for a general nearly isometric matrix with few nonzero entries per row, and Section 6 assembles the recursion and bounds its resources. These intermediate constructions are stated separately so that their hypotheses and uses remain visible.
We first work with controlled single-qubit gates whose entries may be arbitrary functions of their control bits. Section 2 defines these programmable gates and the elementary operations they provide. Section 7 replaces every such gate by a polynomial-length word over the fixed gate set, read from one Boolean oracle. This compilation preserves relative phases between different control values. Throughout the proof, errors are measured on the subspace where the input workspace is zero; a final isometry estimate yields the diamond-norm guarantee in Theorem 1.1.
Controlled tasks and programmable slots
We first construct circuits whose one-qubit gates can be selected from arbitrary tables. This separates the geometry of the circuit from the information about the target unitary. Section 7 will store finite approximations to these tables in one Boolean oracle.
All vector norms are Euclidean, and denotes the operator norm of a linear map . Both and denote its adjoint. We never minimize this norm over scalar phases. For , write
The recursion must synthesize many unitaries coherently. Its input therefore includes a label register with basis , , and its prescribed action is
Let append all working qubits in state . A circuit solves this controlled task with error if
Thus the estimate includes restoration of the working qubits, and is uniform over superpositions of labels. No behavior is prescribed outside the input subspace . The same estimate holds after tensoring with the identity on any further register, because operator norm is unchanged by that operation.
A programmable slot specifies one target qubit and an ordered list of other qubits as controls. Given a table of matrices , its action is
where is the number of controls. A circuit skeleton specifies the registers, targets, and control lists of its slots, but leaves their tables unspecified. The tables may depend on the target unitaries. Their contents are not part of the skeleton that the uniform generator must produce. Reversing a skeleton reverses its slot order and replaces every table by its adjoint table. Slots are uniformly controlled one-qubit gates, or quantum multiplexors, in the terminology of [4].
Every diagonal unitary on qubits uses a single slot: choose one of the qubits as target and put the two diagonal entries for each value of the other bits in the corresponding diagonal table entry. Additional labels can be included among the controls. In particular, reflections in subspaces spanned by specified computational basis states take one slot. A phase depending only on labels can be applied to a zero working qubit, or by scalar matrices on an existing target qubit.
Lemma 2.1 (State preparation). For every there is a skeleton of slots that maps to for any prescribed family of unit vectors . Its structure depends only on the register sizes.
Proof. Fix a label and write . For a binary prefix , let . Process the bits from first to last. At the next bit, controlled on the preceding prefix , apply a real rotation whose first column is
Choose any rotation when . After such slots the amplitude at is . One diagonal slot then supplies the phases of the , choosing arbitrary phases at zero entries. Including among the controls makes all these choices simultaneously. This is the usual conditional rotation construction for state preparation; here an entire uniformly controlled rotation is counted as one slot; see [13, 4].
Lemma 2.2 (Basis permutations). Any family of permutations of the computational basis states can be implemented with slots and temporary qubits that start and finish at zero. The skeleton is independent of the permutations.
Proof. For the permutation , use slots to write its image bitwise into a temporary register:
Each slot chooses either or the bit flip, controlled on and . Next use slots to xor into the first register, controlled on the second register . The two registers become . Swap them using three CNOTs per pair of bits.
The same convention makes a Fourier transform inexpensive. We use the positive-phase transform, so that a frequency basis vector becomes its character in the computational basis.
Lemma 2.3 (Fourier transforms). The unitary
on qubits has a uniformly generated skeleton with slots. Products of such transforms have a number of slots linear in their total register width.
Proof. Write the input integer as . Process its bits in decreasing order of place value. At the bit of place value , apply , then a diagonal slot controlled on the still unprocessed lower bits. Give the state the additional phase that, together with its sign from , makes the ratio of its two amplitudes equal to . Bits above the current bit contribute integral multiples of to this expression, and are no longer needed as controls. The resulting bit is the Fourier output bit of place value . A final reversal of bit order gives the stated transform. There are two slots per processed bit and CNOTs for the reversal.
These constructions retain the scalar phase of every label branch. This is essential: phases that would be irrelevant for one isolated unitary become relative phases when the same operation is controlled by a quantum register.
Producing a contracting block
The reduction will remove a small group of indices from the synthesis problem. For its geometric series to converge rapidly, the corresponding diagonal block of the unitary must have norm bounded away from one. We now obtain such a block using only permutations, diagonal signs, and Walsh–Hadamard transforms. All these transformations have short programmable-slot implementations.
We first record the matrix estimate needed to choose the signs. A Rademacher variable takes the values and with equal probability. The following elementary moment argument is a finite-dimensional form of the noncommutative Khintchine estimate; see Tropp [17], Sections 6–7 for the Gaussian integration-by-parts and trace-product method. We include the proof with the constants used below.
Lemma 3.1 (A matrix sign estimate). Let be Hermitian matrices, and let be independent Rademacher variables. Set . For every integer ,
Proof. We first replace the signs by independent standard real Gaussians and write . Gaussian integration by parts, applied to this matrix polynomial, gives
Indeed, write the first factor of as , use , and differentiate each of the remaining factors in turn.
Put . For a fixed Hermitian , diagonalize it with real eigenvalues . In this basis, for ,
The inequality is the weighted arithmetic–geometric mean inequality after taking absolute values. The last equality uses the symmetry and the evenness of . For the same assertion is equality. Since is positive semidefinite and , equation (3.2) implies
Iterating from yields
Here . Therefore
To return to signs, write , where the are independent of the signs and have common mean . Conditional Jensen gives
Average over the signs, apply (3.3), and use . □
Fix throughout the construction
For an integer , let be the largest power of two not exceeding , and define
We call the first indices ports and the last indices internal indices. Both groups are nonempty.
Proposition 3.2 (A block of uniformly small norm). For every unitary on , there are unitaries and on such that
where the block sizes are from (3.5). The transformations and their inverses have implementations using programmable slots and clean working qubits, with a structure determined by . The same structure works simultaneously for any family , using the label as an additional control.
Proof. If , the last column of has an entry of modulus at most . A row permutation moves this entry to the last position. The resulting one-dimensional block satisfies , and the permutation has the claimed slot implementation by Lemma 2.2.
Suppose . Let be the last-by-last submatrix of ; it is a contraction. Set , and let consist of its last columns. We will choose diagonal sign matrices on and use on the left and on the right, acting as the identity on the remaining indices. The resulting internal block is
We choose first to bound the entries of , then choose to bound the operator norm of .
For independent signs in , each entry of is a sign sum with . For completeness, a real sign sum with squared coefficient sum at most satisfies
Markov’s inequality, optimized over , bounds its two-sided tail at by . Applying this to the real and imaginary parts shows
There are entries. With , the union-bound failure probability is at most
We may therefore fix such that every entry of has modulus at most . Also .
Let be row of , respectively, regarded as row vectors. Then
Choosing independent signs for , write
The two diagonal blocks of satisfy
The norm of equals . Apply Lemma 3.1 with and . Since , we obtain
The last inequality uses . Some choice of consequently satisfies , which is more than required.
It remains to check the circuit structure. A permutation on the -bit index register moves the last valid indices to the first valid indices, an aligned -element block. On that block, uses at most Hadamard slots, controlled on the remaining bits; each diagonal sign matrix uses one diagonal slot. Undo the permutation afterward. Lemma 2.2 supplies clean -slot implementations of the permutations. All operations preserve the valid -dimensional subspace and are extended unitarily to unused index states. Labels change only the row permutation or diagonal-sign tables, so the same slot structure works for every .
The random signs are used only to prove that suitable tables exist. Each label may use its own choices; the resulting slot circuit is deterministic. The size of the removed block is large enough to make recursion short.
Lemma 3.3 (Dimension decrease). For the parameters in (3.5), . Starting at any and repeatedly replacing by , one reaches in fewer than
steps.
Proof. If , then , because . If , then and , with the same conclusion. Thus every nontrivial step multiplies the order by at most . If there were such steps, their final order would be at most
contrary to its being a positive integer.
Fourier fields for a smaller unitary
Let , with , and suppose that
The first coordinates are the ports and the last coordinates are internal. We will associate to a family of -dimensional unitaries and two nearly isometric maps from into the space of port-valued functions of . These maps intertwine with the controlled application of . Their Fourier coefficients will have few nonzero entries in each row, which makes the maps implementable by slots.
Closing the internal coordinates
For the moment let be any diagonal unitary of order . Given a port input , feed the internal output back into the internal input through . If is the port output, the equation becomes
Since , the second equation has the unique solution , and the first then gives , where
Thus and collect the full input and output of after the internal coordinates have been closed. For a scalar phase , this is the standard transfer function of a unitary block matrix; see [9], Section 3. The same conservation of norm proves unitarity with independently chosen diagonal phases.
Lemma 4.1. For the unitary block matrix in (4.1) and any diagonal unitary , the matrix in (4.2) is unitary. If
then
Proof. The definitions give . Consequently,
so . Because is square, it is unitary. Thus has the stated top block, and . Taking adjoints proves the first identity in (4.4). Comparing the bottom blocks of gives
Multiplication by and give the second identity.
Truncation and averaging
Fix an integer truncation length , and set
For , write
Number the internal coordinates by and put
The constant first coordinate of gives all diagonal entries of a common phase when the first coordinate of varies. Averaging that phase will separate terms of different lengths in the truncated series. The remaining coordinates record power sums: the Fourier frequency of a product of at most phases will determine its multiset of internal indices, as proved in Proposition 4.3. These two properties will give the norm bound and the row bound, respectively.
Apply Lemma 4.1 at each to obtain , , . Truncate the two Neumann expansions by defining
Here and below, products containing are evaluated at the same . Since every block of a unitary has norm at most one,
Define the field maps by
Although a single matrix need not be a contraction, averaging its squared norm over nearly preserves the norm of every input.
Proposition 4.2. For either or ,
In addition, let apply to the port register, controlled on . Then
Proof. The Gram matrix of is the average of . Fix the last coordinates of and vary its first coordinate. Writing , the scalar ranges uniformly over the -th roots of unity, while stays fixed. The summand of index in the lower block of is
The degrees are distinct modulo . Their orthogonality under averaging shows that the port block of is , that its off-diagonal blocks vanish, and that its internal block is
Unitarity of gives . Therefore the sum telescopes:
As , the internal block lies between and . Averaging the remaining coordinates of preserves these inequalities.
For , set and . Its lower summand is . The negative degrees are again distinct from each other and from zero. Now
so the internal Gram block is exactly the sum in (4.12), with these choices of . This proves (4.10) for both maps.
Finally, Lemma 4.1 and (4.8) give, pointwise,
Apply this bound to a fixed vector and average its squared norm over to obtain (4.11).
Few possible input indices at each Fourier frequency
The norm bounds supply nearly isometric maps. To implement them, we also need a restriction on their matrix entries. Use the Fourier basis
for the first output register of either field map. A row of the resulting matrix is indexed by a frequency and a port ; its columns are the input coordinates.
Proposition 4.3. In these Fourier coordinates, every row of and of has at most nonzero entries.
Proof. First, the sum of the vectors over any multiset of at most internal indices determines that multiset uniquely. Indeed, every coordinate of such a sum, regarded as an ordinary nonnegative integer, is at most , so reduction modulo loses no information. Its first coordinate records the length , and the next coordinates record the power sums . The elementary symmetric polynomials are recovered successively from Newton’s identities
These identities follow by taking the logarithmic derivative of and comparing coefficients. Consequently the monic polynomial , and hence its multiset of roots, is determined.
An input port contributes only to frequency zero and the same output port. For an internal input , the lower columns of are sums of
whereas those of are sums of
In both cases the rightmost diagonal factor acts on input . Thus every monomial contains the phase belonging to , and its frequency is the signed sum of the over a multiset of between 1 and internal indices containing . The sign is negative for and positive for . For example, the second displayed term on the side has entry
Fix a nonzero frequency and an output port. For , negate the frequency first to recover the corresponding positive tuple sum. By the uniqueness just proved, all its contributing monomials have the same multiset of internal indices. Only indices belonging to that multiset can therefore occur as nonzero input columns. There are at most of them. The ordering of indices in a monomial can change its coefficient but cannot enlarge this column set. No internal monomial has frequency zero, since its first coordinate has absolute value between and modulo . At frequency zero the single port column gives the required bound as well.
The role of the power-sum phases is now explicit: a frequency remembers an unordered list of internal visits, so it permits only a short list of possible input indices. The next section uses exactly this list to erase the input register coherently.
Implementing the field encodings
A matrix with few nonzero entries in each row admits a useful slot construction. First prepare each column while retaining its input index. Then, conditional on the output row, erase that index with an amplitude determined only by the maximum row size. Two reflections amplify the result. When the matrix is nearly isometric, all its singular directions require almost the same amplification angle. The reflection argument is amplitude amplification [6], Section 2. Preparing states to realize a matrix as a block of a larger unitary is also a standard block-encoding method [10], Lemmas 47–48. Here arbitrary table-controlled column preparation permits us to use sparsity only in the rows.
A construction for a nearly isometric matrix
Let be a set of rows encoded in a -qubit register, and let have entries , where . Fix an integer . Suppose that every row has at most nonzero entries and
All these data may depend on a label register, with the same dimensions and bounds for every label. The construction below treats labels as controls.
Extend the -qubit input index by high bits, and add the row register and two one-bit flags. Let embed with all these new qubits zero. Let embed with the extended index zero and both flags equal to one. Write and for the corresponding projections. Thus allows any valid row, while allows any of the input indices. We call the range of the good subspace.
Lemma 5.1. Under (5.1), an exact-slot unitary satisfies
It uses slots and fresh qubits. Its slot structure depends only on the register sizes, , and , and it works coherently for any family of matrices indexed by labels.
Proof. Set
We first construct a unitary B with the prescribed block
For each valid input , the column norm is at most one. Conditional on , use Lemma 2.1 to prepare the row register and first flag in a unit vector whose flag-one part is
The remaining squared norm is placed in the flag-zero subspace. The input index is unchanged during this preparation.
For each row , choose a list of exactly distinct extended indices containing every with . Such lists exist because the extended index space has dimension . Padding indices need not be valid inputs. Conditional on the row, apply the inverse of a state preparation for
on the extended index register. Its matrix element from any to zero is . Finally rotate the second flag so that its amplitude at one is . This is possible because . Prescribe arbitrary unitary extensions for invalid indices and rows. Projecting onto index zero and flags one now multiplies each relevant by , proving (5.4). All three operations together form B.
Starting with B, perform rounds of
These are implementable with B, its inverse, and diagonal reflections. We verify their action on every singular direction of . Let be an orthonormal basis of right singular vectors and write
where the are orthonormal. In this calculation identify the input and output spaces with their embeddings and . By (5.4),
for a unit vector in the kernel of . The are mutually orthogonal: this follows by taking pairwise inner products in (5.6), using unitarity of B and orthogonality of the . Each is also orthogonal to every .
For completeness, both reflections preserve the plane spanned by . The first reflection is about the range of , which is spanned by the mutually orthogonal vectors . Within the th plane it is therefore reflection about ; the second reflection changes the sign of and fixes . Their product in the order (5.5) sends
After rounds, the angle is . As , the distance of this vector from is at most
Here , so the derivative of is at most on , and . The error vectors lie in mutually orthogonal planes. The same bound therefore holds in operator norm on the whole input space, proving (5.2).
The first preparation uses slots and the second , so B uses slots. The complete circuit contains occurrences of B or B* and diagonal reflections. A diagonal reflection is one slot, as explained in Section 2. No additional workspace is needed. All prescriptions can be made separately for each label using the same slot positions and controls. Since the resulting maps are block diagonal in the labels, the bounds hold for coherent superpositions of labels as well.
Applying the construction to the Fourier fields
In the preceding section, a row is a frequency and a port. Let
Encode the frequency in qubits and the port in qubits, using the first port states. The two field maps have the same row space and therefore use the same output embedding : extended input index zero, both flags one, and a valid port. This shared layout will allow the second encoding to be reversed after the recursive call.
Proposition 5.2. Under the hypotheses and definitions of Section 4, there are exact-slot unitaries such that
Each uses slots and fresh qubits, with slot structure independent of . The construction works coherently with any additional label register.
Proof. Write either field map in Fourier coordinates. Proposition 4.3 gives at most nonzero entries in each row, and Proposition 4.2 supplies (5.1) with . Apply Lemma 5.1, taking , to obtain the corresponding coefficient map with error at most . Then apply the positive Fourier transform to each of the frequency factors, so that becomes . The same physical register now holds the phase label , rather than the Fourier frequency . Lemma 2.3 implements these transforms using slots. They preserve the range of , because every frequency is allowed there and the index, flags, and port are unchanged. Thus they convert the coefficient map into the field map in the same embedding , while preserving the error norm on the full space. Their addition gives (5.8) and the stated resource bounds.
Assembling the recursion
The two field encodings now reduce synthesis of to synthesis of the smaller controlled unitary . The reduction uses the smaller circuit exactly once. This fact keeps the total circuit size polynomial even though the number of recursion levels grows with .
Lemma 6.1 (One synthesis step). Let be a unitary on in the block form of Proposition 3.2, and let . Use the fields and encoders of Sections 4 and 5 with truncation length . Suppose a circuit synthesizes the family of -dimensional unitaries , controlled by , with clean-workspace operator norm error . Then one use of that circuit, preceded by and followed by , synthesizes with clean-workspace error at most
The assertion also holds coherently for a family , with the smaller circuit controlled by both and .
Proof. Let embed the current index space into the full register layout by initializing all working qubits to zero. Include the fresh working qubits of the smaller circuit in this definition. Let embed the field space into the encoder’s good subspace, again with the smaller circuit’s fresh workspace zero. Write for the smaller synthesis circuit acting on its target, control, and fresh working registers, and as the identity on the remaining registers. Its approximation guarantee implies
Indeed, the good subspace has a valid port index, and applies with the phase register as control.
Put . Proposition 5.2 gives
The field maps are contractions by Proposition 4.2, and their intertwining bound is (4.11). Consequently,
Multiplication by proves (6.1). This calculation invokes the smaller circuit’s approximation only on the ideal field-map output, whose norm is at most one. Any component of the actual encoded state outside the good subspace is covered by the first error term and is not enlarged by .
For additional labels , all maps are block diagonal in the label basis and all bounds are uniform over the labels. Their operator norms on the full controlled space are the maxima of the block norms. The same calculation therefore applies to arbitrary coherent superpositions of labels. □
Figure 1 shows the comparison made in this proof. The amplification inside and repeats only their own state-preparation circuits. It never repeats .
We can now choose one set of parameters for all recursion levels. Keep from (3.4) and (3.8), and set
Thus is the number of qubits in each field’s phase register.
Proposition 6.2 (Uniform programmable synthesis). Let , , and . There is a programmable-slot circuit structure, determined by , with the following property. For every family of unitaries on , its slot tables can be chosen so that the circuit implements the controlled unitary , preserves the labels, and has clean-workspace operator norm error less than in the sense of (2.1). The circuit uses
Its structure, including each slot’s ordered control list, is generated deterministically in time polynomial in from .
Proof. We recurse on the valid order , retaining -bit index and port registers at every level. If , each is a scalar phase, implemented exactly by one slot on an index bit that is zero throughout the valid input subspace.
For , Proposition 3.2 gives with internal order and port order . Apply the one-step construction of Lemma 6.1, prescribing the recursive family to be and adding to the existing control labels. Supply fresh working qubits for this recursive circuit. To implement , apply before this construction and afterward. These transformations have exact slot implementations, so they introduce no further error. Their order is correct because .
At each step, Lemma 6.1 adds at most
to the error of the smaller circuit. There are fewer than steps by Lemma 3.3. Bernoulli’s inequality gives , and hence . The total error is therefore
In particular, all working qubits, including those introduced at inner recursion levels, return to zero in the ideal comparison map.
We next count the circuit resources. Write and . Our parameters satisfy
Proposition 5.2 uses fresh qubits for a pair of encoders and slots for each encoder. The two encoders at one level share the same register layout. The pre- and post-conditioning operations require only more clean working qubits and slots. All registers from an outer level remain allocated during an inner call, so summing over the at most levels gives
total qubits. Summing the slots gives
These sums suffice because there is only one recursive call at a level. The local amplification repetitions have already been included in the factor in the encoder cost.
Finally, the structure can be generated without computing any of its table contents. The successive orders have -bit descriptions and are computed in polynomial time. Register allocations, state-preparation bit order, Fourier transforms, reflections, and the fixed number of amplification rounds depend only on these sizes. Every operation depending on —the signs, permutations, state-preparation amplitudes, support lists, and recursively prescribed matrices—changes only a slot table. At most register positions occur in any ordered control list, so writing all such lists for slots still takes polynomial time in . No list of possible label values is generated. This proves both the uniformity assertion and (6.4).
Compilation into one Boolean oracle
The skeleton of Proposition 6.2 specifies only polynomially many slots, although each slot may have a large table. We now encode finite gate words for those tables in one Boolean function. Two details require care: the words must approximate matrices with their actual phases, and the resulting circuit must be generated without finding those words. The need to retain scalar phases under coherent control is already present in the general controlled-gate decompositions of [3].
Phase-sensitive one-qubit approximation
We first prove the approximation fact needed for the compilation. The argument combines the irrational-rotation proof of universality for this gate set [5] with the commutator refinement underlying the Solovay–Kitaev theorem [7]. The weaker polynomial bound below is sufficient for our purpose.
Lemma 7.1. There is an absolute positive integer such that every and every admit a word in of length at most whose matrix has determinant one and differs from by at most in operator norm.
Proof. Write for the Pauli matrices, with , and put . We first show that the determinant-one words are dense in . Up to their scalar factors,
Thus , where has trace
Recall that an algebraic integer is a root of a monic polynomial with integer coefficients; equivalently, its monic minimal polynomial over has integer coefficients. The displayed trace is not an algebraic integer, because its monic irreducible polynomial is . Consequently the eigenvalues of cannot be roots of unity: roots of unity are algebraic integers, and sums of algebraic integers are algebraic integers. Writing its eigenvalues as , we have . The word has determinant one, and its powers are dense in the one-parameter circle about the rotation axis of .
For completeness, every matrix in has the form , with a unit vector, except that the axis can be chosen arbitrarily when . Multiplying the two rotations defining shows that its axis is not parallel to the axis. Conjugation by rotates this axis through about , giving a nonparallel axis. The closure of the determinant-one words contains both corresponding circles: conjugation of a determinant-one word by is again such a word. Rotating the second axis slightly about the first moves it out of the plane they span. Conjugation by an element of the first circle therefore gives a third circle with a linearly independent axis. Let be the three axes. The derivative at zero of
sends to , an isomorphism onto the three-dimensional tangent space of at the identity. The inverse function theorem shows that these products contain a neighborhood of the identity. The closure of our words is thus an open subgroup. Every other coset is open as well, so connectedness of forces this subgroup to be all of . Here connectedness also follows from the preceding representation of as the unit sphere in .
We next obtain a uniform length bound. Density and compactness provide a finite -net of determinant-one words of some fixed maximum length , where will be chosen sufficiently small. Suppose that words of length at most form an -net, and choose such a word within of a target . The residual has the form
for sufficiently small . The Pauli commutator identity gives skew-Hermitian matrices
with : take perpendicular vectors with and equal lengths. For and , expansion of the four exponential series through degree two gives
All errors here are in operator norm with absolute constants; the remaining terms of the exponential series are bounded by a constant times .
Choose net words within of . The gain in precision survives this substitution. Indeed,
The first inequality follows by writing and cancelling the identity terms; the second is the same calculation with the roles reversed. Both right sides are . Therefore the word
approximates to and has length at most . Inverse words are available because and both and belong to the alphabet.
Choose the fixed initial net so small that . Repeating the refinement times gives error at most and length at most . Taking just large enough for the former quantity to be at most gives a length bounded by , since .
Only the existence of the fixed integer will be used. A generator can hardcode this integer; it does not need the net or a procedure that selects approximating words. Those selections will be stored in the oracle.
Lookup, control, and restoration of scratch space
Proposition 7.2 (Compilation of slots). Let a skeleton have slots on qubits, and put for an integer . There is a deterministic procedure, polynomial in , that produces a circuit over and one Boolean oracle, with polynomially many qubits, gates, calls, and address bits. For every assignment of the slot tables, some contents of that oracle make the circuit differ from the prescribed skeleton by at most on inputs with its added scratch qubits zero, with the comparison circuit keeping those scratch qubits zero.
Proof. First consider one table entry . Choose a real number and a matrix such that
By Lemma 7.1, choose words within of and of
Pad every word with identities to the common length . Apply the first word to the slot target and the second to a fresh scratch qubit initially in . Their ideal actions on this input multiply to on the target and return scratch to zero. The two approximation errors add to at most . Since different occupy orthogonal control blocks, this is an operator-norm bound for the entire controlled slot. In particular, the scalar factor has been retained as a relative phase between control values.
Use two bits to encode each symbol in . A single Boolean function stores all symbol bits at addresses containing
Pad the field for to bits. This makes every address have a common length . For each word position, copy the slot’s controls into the address by CNOTs, set the fixed address bits, and query the two symbol bits into zero qubits. Apply the specified symbol conditionally, then erase the symbol bits by querying again and reverse the address preparation. The original slot controls do not change under any of these target operations, so the erasure is exact even in a superposition of control values.
We verify that symbol selection uses only the allowed elementary gates. Bit flips are available as . On bits , the integer identity
implements a doubly controlled using : compute each parity into clean scratch, apply its indicated phase, and uncompute it. Conjugating the target by gives Toffoli. Thus equality tests on symbol bits and all required reversible address operations are exact. To apply conditionally, compute the AND of its control and target into a clean scratch bit, apply there, and uncompute the AND; the same construction applies to .
For a controlled , define
Because , we have and hence
Apply to the target, then a controlled , then . When the control is zero the two unconditional gates cancel; when it is one their product is exactly . A controlled itself is a CNOT conjugated on its target by . This proves that every selected symbol, including its phase, can be applied exactly.
It remains to compose the approximate slots. Let denote the actual implementation of slot , and let denote the ideal slot acting trivially on all added scratch. The phase scratch may be reused. Although its actual state need not be exactly zero after a slot, the identity
uses the error only after an ideal prefix. Such a prefix keeps all added scratch at zero, precisely where the one-slot bound applies. The unitary suffix preserves its norm. The total error is therefore at most on the claimed input subspace.
There are two words per slot, symbol positions per word, and a polynomial number of elementary operations per lookup. The addresses, scratch, and total circuit size are thus polynomial in , , . Generating the circuit requires only the skeleton, the fixed length bound, and ordinary integer arithmetic. In particular, it never selects a word or computes a table entry. Each target merely determines one admissible Boolean function storing all choices. Adjoint slots can have their own addresses and approximating words, or can reverse and invert stored words; either convention uses the same single oracle.
Proof of Theorem 1.1. Apply Proposition 6.2 with and no initial labels. Its skeleton has polynomially many qubits and slots, and approximates the target unitary, including restoration of its working qubits, to error less than . If it has slots, compile it using
Proposition 7.2 adds error less than . The entire circuit is therefore within in operator norm, on zero-workspace inputs, of applying and returning every other qubit to zero. The same polynomial bounds its width, number of gates and calls, oracle address length, and the running time of its deterministic generator, after increasing fixed coefficients if necessary.
Take the original index qubits as the designated outputs. For a pure input state together with a reference register, let and be the actual and ideal final unit vectors before discarding workspace. The operator-norm estimate gives . Since the trace norm of a rank-one matrix is ,
Partial trace cannot increase the trace norm of a Hermitian matrix, and convexity gives the same bound for mixed input states. In particular the supremum in Theorem 1.1, with its -qubit reference, is at most .
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